III-V Silicon Tandem Photovoltaics

III-V tandem solar cells can absorb light across a broad range of wavelengths in the solar spectrum and are ideally suited to efficiently convert UV, visible and near infrared photons into electricity.  In combination with silicon as a bottom cell, highly efficient tandem solar cells with two or even three sub-cells can be realized. The III-V sub-cells are only a few micrometers thick, due to the high absorption properties of the III-V compound semiconductor materials. This combination of materials opens up interesting ways for a cost-effective production, however, there are still challenges to be met, which we are addressing in our ongoing R&D projects: One challenge is to develop a cost-effective epitaxial growth of III-V layers on silicon, i.e. to overcome the lattice constant differences in the various materials. Currently we are investigating two concepts for 2-terminal monolithic solar cells. On the one hand, the III-V layers are grown directly on silicon, and on the other hand, they are transferred from a GaAs to Si substrate using wafer or adhesive bonding. At Fraunhofer ISE we achieved a peak conversion efficiency of 34.5% (AM 1.5g) for a III-V silicon tandem solar cell, thus establishing a new world record.

We develop III-V silicon solar cells using direct epitaxy as well as by wafer bonding or adhesive bonding. All III-V semiconductor layers are manufactured in our two modern, industrial-scale MOVPE reactors: an AIX2800 G4 TM reactor with 8 x 6 inch configuration and a CRIUS showerhead reactor for 7 x 4 inch or 1 x 300 mm substrates. For the direct epitaxial growth, GaP is grown on silicon and then the lattice constant of GaAsP is tuned to produce absorbers with a band gap between 1.4 eV (GaAs) and 1.9 eV (GaInP). By varying the growth conditions in this process, we have been successful in reducing defect densities in recent years to ca. < 107 cm^-2 for GaAs on silicon. Further challenges are the development of suitable absorber layers, barriers and tunnel diodes.

For the wafer-bonded structures, we first grow the upper III-V semiconductor layers on gallium arsenide and then transfer them to a partially processed silicon bottom cell. The connection can be realized by a direct wafer bond or a conductive adhesive bond. A two-terminal monolithic device is created. To reach our aim and lower costs, the cell production requires cost-effective production processes for i) the III-V layers, ii) the transfer of the thin layers of a few micrometers, iii) the bonding or adhesive technology and iv) the recycling of the expensive GaAs substrates. These are all important research aspects to which we are dedicated.

Our R&D Services

• Direct epitaxy of III-V semiconductors on silicon with diameters up to 300 mm (Examples: GaP nucleation on silicon, GaPN, GaAsP, GaAs, GaInP)
• Characterization of defects in III-V semiconductor layers (e.g. antiphase domains, stacking defects, mismatch dislocations)
• Processing and process development for III-V devices on silicon bottom cells